The present invention relates to a method and a circuit for producing an authentication code enabling the access to a microcircuit to be secure.
The present invention relates in particular to the field of smart cards, and more particularly to wired-logic microcircuits that are used in smart cards.
Under the generic term of "chip cards", two principal categories of cards are indeed meant, whose technology is different: on one hand, the microprocessor cards, and, on the other hand, the cards called "smart cards". Unlike microprocessor cards, smart cards are only provided with a wired-logic microcircuit, which offers much fewer possibilities in terms of facility of use, data processing ability, programming, and in particular in terms of security and fraud protection than a microprocessor microcircuit.
In compensation, wired-logic microcircuits have the advantage of a simpler structure and a very low cost price, so that smart cards have had an important development last years for applications where a high level of security was not necessary. Thus the use of pre-payment cards like telephone cards has been generalised. New applications such as electronic purses or electronic keys (in particular in the field of cars) are, at present, being considered for use on a large scale.
It is however necessary that wired-logic microcircuits should provide a much greater security level in the future than at present for the development of these numerous future applications and, as regards security in use, that they should be able to compete with microprocessor circuits which are provided with improved software security mechanisms.
Thus, a general purpose of the present invention is to improve the protection mechanisms of wired-logic microcircuits, keeping in mind that manufacturing costs rise very quickly when sophisticated security functions are to be performed.
As a reminder, FIG. 1 shows the structure and the working of a microcircuit 1 of a conventional smart card. The wired-logic microcircuit 1 mainly comprises a serial memory 2 (i.e. a bit by bit accessible memory), an authentication circuit 3 and a sequential logic circuit 4 which controls the functioning of the various elements by means of a clock signal H which is provided by a terminal 10 into which the card is inserted. The memory 2 contains, stored in bit form, a serial number of the card NI (or identification number of the microcircuit) and transaction data DA, for example data representing the monetary value of the card or a number of telephone pulses. The authentication circuit 3 has a serial input 3-1 for receiving an input code CE and a serial output 3-2 for producing an authentication code CA. Furthermore, the microcircuit 1 is provided with contact pins for the electrical interface with the terminal 10, among which an input-output contact pin I/O for the digital data communication, a contact pin RST for initialising the microcircuit, a contact pin H for the input of the clock signal and two contact pins Vcc and GND for power supply. The output of the memory 2 as well as the input 3-1 and the 30 output 3-2 of the authentication circuit are coupled to the input-output contact pin I/O. The digital data circulate in serial form, that is bit by bit in synchronism with the lock signal, which allows a simplification of the internal structure of the circuit, as the connections between the various elements are limited to one wire only.
When the card is inserted into the terminal 10, the terminal 10 has to determine, for security reasons, if the card is authentic or fraudulent. The authentication circuit 3 thus takes part into a verification procedure as hereunder described for verifying the authenticity of the card. It is first recalled that the terminal 10, which is generally provided with a microprocessor 11 controlled by a programme memory 12, knows the secrets of the security mechanisms introduced into the card.
Step 1--The terminal 10 generates a random binary code ALEXT and applies it as an input code CE to the authentication circuit 3. The circuit 3 transforms the code ALEXT into an authentication code CA which can be written EQU CA=F.sub.Ks (ALEXT)
F.sub.Ks representing the transformation function, or authentication function, performed by the circuit 3 from a secret key Ks which is at its disposal.
Step 2--In parallel with step 1, the terminal 10, which knows the secret key Ks and the authentication function F.sub.Ks (stored as software in the programme memory 12) for its part calculates a code CA' such that EQU CA'=F.sub.Ks (ALEXT)
Step 3--The terminal 10 compares the code CA produced by the card and the code CA' calculated by itself. If the two codes are different, the card is not authentic and must be refused by the terminal.
In a known alternative of this method, the terminal 10 does not know the secret key Ks but determines it from the serial number NI and by means of another secret key Kp at its disposal and a transformation function F.sub.Kp such as EQU Ks=F.sub.Kp (NI)
In this case, step 1 is preceded by a preliminary step wherein the terminal 10 reads the serial number NI out of the memory 2 and uses it to deduce Ks.
Finally, it appears that the protection mechanism against fraud relies entirely upon the authentication function F.sub.Ks performed by the circuit 3 and must not be able to be decoded by a fraudulent person.
Therefore, an authentication circuit has to present the following characteristics or advantages to be optimal:
a serial input and a serial output, PA0 the ability to produce a long authentication code, that is of at least 16 bits, after introduction of the input code CE, PA0 a very high security, that is the quasi impossibility for a fraudulent person to find out the internal working of the authentication circuit, PA0 the generation of one bit of the authentication code at each clock pulse, PA0 the production of two very different authentication codes CA from two very similar input codes CE differing for example by one bit only (the same succession of "1" and "0" with only one bit having not the same value).
For the man skilled in the art and as illustrated in FIG. 2, an authentication circuit 3 is a logic machine 6 clocked by a clock signal H, in which is injected a series of bits forming the input code CE in synchronism with the clock signal H and out of which is extracted a series of bits forming the authentication code CA, in synchronism with the clock as well. In the present patent application the term "logic machine" is understood as a logic circuit characterised by an internal logic state at a certain moment, then by another internal (logic) state at a following moment, and so on, able to operate independently, that is to switch from an internal state to another internal state upon reception of a clock signal also when no input code CE is applied to it. The operating mode of the logic machine 6 must be secret and is generally based on a secret key Ks. The introduction of the bits of the input code CE modifies the transitions of the internal states of the logic machine, and the authentication code CA which is serially extracted out of the logic machine is representative of the internal state transitions of the machine.
If it is desired to produce a serial code CA having a certain length, for example a 16 bit code, after the introduction of the input code CE, it is necessary to have at one's disposal a logic machine presenting a large number of internal states and a large diversity in the series of its internal states. For example, to produce an authentication code CA of 16 bits after the introduction of the input code CE, it is necessary to have a logic machine able to perform about 65500 different transitions between its internal states to use all the possibilities offered by the 16 bits of the authentication code (a 16 bit code being able to take about 65500 values).